Typically in high speed testing and computing system when a failure occurs it is difficult and in some cases, impossible to exactly identify the cycle, memory address and/or function being performed at the time of the error. The problem is one of recognizing the failure and feeding back information to inhibit further processing prior to the execution of any subsequent events. This phenomena may be referred to as system hysterisis and often results in the processing of several events before the system can be stopped. More specifically, given a machine performing a function on each oscillator cycle and with a hysteresis (time to stop the oscillator) of N cycles then the machine, when an error is detected, will stop N cycles past where the error actually occured. This situation would be acceptable if all error types always exhibited the same hysteresis since the failing cycle could always be located by deductive reasoning. Since hysteresis is not always the same and not always identifiable with absolute accuracy, it becomes necessary to provide other means for locating errors. This has typically been solved by manually operating the machine at slow enough rates whereby the system hysteresis is no longer a factor. Since many errors are cycle rate dependent and occur only when the machine is operating at full speed the use of this technique often causes the error to not reoccur. When this happens locating the error results in exhaustive and time consuming diagnostic techniques often of a hit or miss nature, until repairs can finally be initiated.
The foregoing is a generalization of a specific problem as applied to general purpose computing systems.
In testing machines where the cycle rate is continuously variable, as is the hysteresis and where the failing cycle need be specifically identified, and where the cycle rate is critical there has been prior to this invention, no method to identify with certainty the exact cycle wherein an error occured. While this primarily applies to dynamic functional speed test systems it should be obvious to those skilled in the art that a similar situation exists in all test applications.